Santosh Abraham is a Member of the Technical Staff at Hewlett Packard Laboratories. Prior to joining HP Labs, Santosh taught at the University of Michigan, Ann Arbor. Santosh co-authored over 40 papers in multiprocessor systems, optimizing compilers, performance evaluation, memory hierarchy simulation and design. Santosh co-developed the widely used Cheetah cache simulator. Santosh received a B.Tech degree from the Indian Institute of Technology, Bombay, M.S. from the State University of New York, Stony Brook, and Ph.D. from the University of Illinois, Urbana, all in Electrical Engineering.

Memory structures of custom embedded systems contain buffer memories and local memories, in lieu of conventional caches. Santosh's current research is in automating the design and compilation for such memory structures.

Santosh was the primary designer and implementer of the Trimaran scheduler. The Trimaran scheduler supports meld scheduling and a variety of scheduling algorithms, including back-tracking. Santosh also developed a module to utilize memory dependence profiling information.

Within Elcor, Santosh designed a module that reduces cache stalls by increasing the scheduling distance between loads that are likely to miss and their uses. Santosh co-designed a module to utilize effectively the local memory ports in architectures that have a local memory in addition to a conventional memory hierarchy. In the overall Pico framework, Santosh designed and implemented the Memory Spacewalker that automatically and efficiently evaluates a specified range of memory hierarchies using the Cheetah simulator and produces paretos for each level of the memory hierarchy as well as for the overall system.