Vinod Kathail is a Project Scientist in the Compiler and Architecture Research group at HP Laboratories. Since joining HP, he has been working on ILP architectures and compilers for both general-purpose and embedded computing. He was a key contributor in the development of the Explicitly Parallel Instruction Computing (EPIC) that is the basis for IA64 and is the primary author of the HPL-PD architecture report. He has been instrumental in the development of Elcor compiler, which constitutes most of the machine-dependent part of the Trimaran research infra-structure. Vinod holds 5 patents and has numerous research publications in the areas of VLIW architectures and compilers, dataflow architectures and functional languages.

His research interests include EPIC architectures and compiler technology, automatic architecting and synthesis of application-specific processors for embedded computing, and programming languages and their implementations. Vinod received his B.Tech degree from MACT, Bhopal, his M.Tech from Indian Institute of Technology, Kanpur, and his Sc.D. in computer science from Massachusetts Institute of Technology, Cambridge.

Vinod leads HP Labs Trimaran effort. He has been the Chief Architect of Elcor and has been managing its development since its inception. He designed Elcor's internal representation which provides full support for region-based compilation. He also contributed to Elcor in the areas of meld-scheduling, modulo scheduling, region-based register allocation, machine description system for machine description-driven compilation, and region-based compiling.