Shail Aditya Gupta received his B.Tech. in Computer Science and
Engineering from Indian Institute of Technology, Delhi, India, and
his S.M., E.E. and Ph.D. in Computer Science from Massachusetts
Institute of Technology, Cambridge, USA. At MIT, Shail was a key
contributor in the design and development of the implicitly-parallel
dataflow language Id and its successor pH (parallel Haskell). His
research interests range from strongly typed programming languages
and type inference systems to various aspects of parallel computing
including the design of multi-threaded and VLIW compilers, processor
architectures and parallel applications.
In 1995, Shail joined Hewlett-Packard Labs as a Software Design Engineer in the Compiler and Architecture Research Group. Since then he has been working in the field of automatic design and synthesis of custom, application-specific, embedded processors and their programming environments.
Shail's primary contribution to Trimaran was the MDES interface design and development. He also contributed towards the modulo-scheduler and the integration and testing framework for the Elcor backend.